FIG. 1 is a schematic diagram illustrating an exemplary semiconductor chip 100. As illustrated, the semiconductor chip 100 comprises one or more semiconductor devices 102a-102n (hereinafter collectively referred to as “semiconductor devices 102”), such as transistors, resistors, capacitors, diodes and the like deposited upon a substrate 104 and coupled via a plurality of wires or interconnects 106a-106n (hereinafter collectively referred to as “interconnects 106”). Currently available semiconductor devices 102 and interconnects 106 share power, thereby distributing a thermal gradient over the chip 100 that may range from 60 to 140 degrees Celsius in various regions of the chip 100, depending on the application.
Semiconductor chips such as the semiconductor chip 100 typically comprise the bulk of the components in an electronic system. As such, proper thermal analysis is critical to the design of semiconductor chips e.g., to ensure that a chip constructed in accordance with a given design will operate as intended and will not fail in use. The precise thermal gradient generated by dissipated heat from a semiconductor chip is determined by the local temperatures of the semiconductor devices and the interconnects, which vary throughout the semiconductor chip. Accordingly, a thermal analysis tool requires accurate temperature data for these semiconductor devices and interconnects in order to reliably assess the expected performance of the semiconductor chip design.
Despite this, conventional thermal analysis tools assume a single, uniform temperature throughout the semiconductor chip. The resultant designs thus do not always conform to the design standards or parameters. Moreover, most known methods for modeling or simulating thermal gradients of semiconductor chips for analysis are too generic, too computationally complex, or consume too many resources (e.g., processing or memory) to be feasibly applied to the modeling of full-chip thermal gradients.
Therefore, there is a need in the art for a method and apparatus for thermal modeling and analysis of semiconductor chip designs.